Asian Journal of Information Technology

Year: 2016
Volume: 15
Issue: 22
Page No. 4522 - 4527

Design of Reconfigurable Discrete Cosine Transform in Multicore Architecture

Authors : R. Radhika and R. Manimegalai

Abstract: The image processing has an important play in multimedia systems. The image is processed and compressed effectively to reduce the storage area. For the process of compressing it is important to convert spatial domain to frequency domain. This study proposes the application of DCT algorithm in multi core FPGA (Field Programmable Gate Array) to enhance the performance by simultaneously running all the cores. The matrix format image is transformed into serial format (Hexa decimal) using MATLAB. To perform the DCT simultaneously and in a parallel manner, the serial format values are put into the XILINX. There is severe delay experienced by each core and the processing speed is also reduced. This happens due to more time taken for read operation of memory. The transformation performance in multi core is compared with single core. The parameters like delay and power consumption are reduced in multi core than in single core.

How to cite this article:

R. Radhika and R. Manimegalai, 2016. Design of Reconfigurable Discrete Cosine Transform in Multicore Architecture. Asian Journal of Information Technology, 15: 4522-4527.

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