Authors : A. Saravanaselvan and B. Paramasivan
Abstract: Most of the current sensor devices use general purpose processor which is not primarily designed to offer the inherent parallelism for event-driven sensor applications. FPGA based event-driven architecture can handle several events in parallel which removes the timing uncertainty and overhead. Due to random deployment of sensor nodes in remote areas, nodes are vulnerable to many security attacks related to data confidentiality, integrity and authentication. With respect to resource constraints of sensor nodes, traditional security mechanisms are not suitable for wireless sensor nodes. Considering this, a message digest scheme by using maximum length sequence primitive polynomial approach is presented for FPGA based event-driven architecture so as to ensure node-level data integrity for time and mission critical tasks. In addition, configurable serial transmitter and receiver blocks were added to the designed block using which data size can be configured as per the application scenario. The performance of this scheme is evaluated and compared with other existing processor-based schemes.
A. Saravanaselvan and B. Paramasivan, 2016. An Enhanced Approach of Message Digest Scheme for FPGA Based Sensor Node. Asian Journal of Information Technology, 15: 4571-4577.