Journal of Engineering and Applied Sciences

Year: 2017
Volume: 12
Issue: 9
Page No. 2371 - 2376

Proposed System Architecture for Integrity Verification of Embedded Systems

Authors : Abdo Ali A. Al-Wosabi and Zarina Shukur

Abstract: Since, the digital devices play essential roles in our daily life, system integrity is important. Thus, there is a need to propose appropriate and effective techniques/tools to verify that the original/pure Embedded Systems (ESs) have been used in those devices. We present our proposed system architecture for ESs integrity verification which includes two main phases: fetching an ES code at a server site (i.e., data center) and examining the ES at a remote site (using a designed user application). The integrity of that ES could be verified by comparing the computed hash value, result could show whether that system has been altered or tampered with. We integrate hash function (SHA-2) with a random key to calculate a unique digest value for a targeted system. Also, we use timestamps and nonce values, two secure keys and public key algorithm to design a security protocol.

How to cite this article:

Abdo Ali A. Al-Wosabi and Zarina Shukur, 2017. Proposed System Architecture for Integrity Verification of Embedded Systems. Journal of Engineering and Applied Sciences, 12: 2371-2376.

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