Research Journal of Applied Sciences

Year: 2012
Volume: 7
Issue: 8
Page No. 387 - 390

Direct Digital Frequency Synthesizer Design and Implementation on FPGA

Authors : A.A. Alsharef, M.A. Mohd. Ali and H. Sanusi

References

Bellaouar, A., M.S. O'brecht, A.M. Fahim and M.I. Elmasry, 2000. Low-power direct digital frequency synthesis for wireless communications. IEEE J. Solid-State Circ., 35: 385-390.
CrossRef  |  Direct Link  |  

Hegazi, E.M., H.F. Ragaie, H. Haddara and H. Ghali, 1998. A new direct digital frequency synthesizer architecture for mobile transceivers. Proceedings of the IEEE International Symposium on Circuits and Systems, Volume 3, May 31-June 3, 1998, Monterey, CA., USA., pp: 647-650.

Mortezapour, S. and E.K.F. Lee, 1999. Design of low-power ROM-less direct digital frequency synthesizer using nonlinear digital-to-analog converter. IEEE J. Solid-State Circ., 34: 1350-1359.
CrossRef  |  

Nicholas, H., H. Samueli and B. Kim, 1988. The optimization of DDFS performance in the presence of finite word length effects. Proceedings of the 42nd Annual Frequency Control Symposium, June 1-3, 1988, Baltimore, MD., pp: 357-363.

Sharma, R.K. and G. Upadhyaya, 2010. Memory reduced and fast DDS using FPGA. Int. J. Comput. Theory Eng., 2: 1793-8201.
Direct Link  |  

Sunderland, D.A., R.A. Strauch, S.S. Wharfield, H.T. Peterson and C.R. Cole, 1984. CMOS/SOS frequency synthesizer LSI circuit for spread spectrum communications. IEEE J. Solid-State Circ., 19: 497-506.
CrossRef  |  Direct Link  |  

Vankka, J. and K. Halonen, 2001. Direct digital synthesizers-Theory, design and application. Kluwer Academic Publishers, Boston.

Design and power by Medwell Web Development Team. © Medwell Publishing 2024 All Rights Reserved