Research Journal of Applied Sciences

Year: 2014
Volume: 9
Issue: 12
Page No. 1120 - 1123

Error Correction Method Results in a Multiplication of the Supercomputer

Authors : Nikolay Ivanovich Korsunov, Igor Sergeevich Konstantinov and Aleksandr Aleksandrovich Nachetov


Cotroneo, D., F. Frattini, R. Natella and R. Pietrantuono, 2013. Performance degradation analysis of a supercomputer. Proceedings of the IEEE International Symposium on Software Reliability Engineering Workshops, November 4-7, 2013, Pasadena, CA., pp: 263-268.

Ding, C., 2014. CUDA tutorial.

DuBois, D., A. DuBois, C. Connor and S. Poole, 2008. Sparse matrix-vector multiplication on a reconfigurable supercomputer. Proceedings of the 16th International Symposium on Field-Programmable Custom Computing Machines, April 14-15, 2008, Palo Alto, CA., pp: 239-247.

Dudnik, V., V.I. Kudryavtsev, T.M. Sereda, S.A. Us and M.V. Shestakov, 2009. Application of the opportunities of tool system Cuda for graphic processors programming in scientific and technical calculation tasks. Comput. Modell. Syst., 52: 159-165.
Direct Link  |  

Farazmand, N. and M.B. Tahoori, 2010. Multiple fault diagnosis in crossbar nano-architectures. Proceedings of the IEEE European Test Symposium, May 24-28, 2010, Praha, pp: 94-99.

Korsunov, N., V. Mikhelev and A. Lomakin, 2013. Application of lattice neural networks for modeling of stationary physical fields. Proceedings of the 7th International Conference on Intelligent Data Acquisition and Advanced Computing Systems, September 12-14, 2013, Berlin, pp: 369-372.

NVIDIA., 2014. Parallel thread execution ISA version 4.1. CUDA Toolkit Documentation.

Nikolov, H., T. Stefanov and E. Deprettere, 2008. Systematic and automated multiprocessor system design, programming and implementation. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., 27: 542-555.
CrossRef  |  

Russek, P. and K. Wiatr, 2007. Dedicated architecture for double precision matrix multiplication in supercomputing environment. Proceedings of the Design and Diagnostics of Electronic Circuits and Systems, April 11-13, 2007, Krakow, pp: 1-4.

Teekaput, P. and S. Chokchaitam, 2005. Secure embedded error detection arithmetic coding. Proceedings of the 3rd International Conference on Information Technology and Applications, July 4-7, 2005, Sydney, Australia, pp: 568-571.

Design and power by Medwell Web Development Team. © Medwell Publishing 2022 All Rights Reserved