Journal of Mobile Communication

Year: 2010
Volume: 4
Issue: 1
Page No. 9 - 16

Design and Synthesis of HDL Code Based on High Level FPGA Design Flow for SDR Model

Authors : Mohd F. Ain, Majid S. Naghmash and Y.H. Chye

References

Avnet Memec, Inc., 2005. Virtex-4 MB development board user�s guide. Ver. 3.0, Phoenix, Arizona, USA., pp: 1-42. http://www.files.em.avnet.com/files/177/v4mb_user_guide_3_0.pdf.

Avnet, Inc., 2006. P240 analog module user guide. Rev. 1.0, Phoenix, Arizona, USA., pp: 1-25. http://www.files.em.avnet.com/files/177/p240_analog-ug.pdf.

De Micheli, G., 1994. Synthesis and Optimization of Digital Circuits. McGraw-Hill, New York.

Dick, C. and J. Hwang, 2004. FPGAs: A Platform-Based Approach to Software Radios. In: Software Defined Radio: Baseband Technologies for 3G Handsets and Basestations, Tuttlebee, W.H.W. (Ed.). John Wiley and Sons Ltd., England, pp: 235-272.

Haessig, D., J. Hwang, S. Gallagher and M. Uhm, 2005. Case-study of a xilinx system generator design flow for rapid development of SDR waveforms. Proceedings of the SDR 05 Technical Conference and Product Exposition, Nov. 14-18, California, USA., pp: 1-6.

Proakis, J.G. and M. Salehi, 2008. Digital Communications. 5th Edn., McGraw-Hill, New York, pp: 95-148.

Synplicity, Inc., 2007. Synplicity FPGA Synthesis Reference Manual. Synplicity, Inc., Sunnyvale, California, USA., pp: 1-20.

Texas Instrument, Inc., 2005. DAC5687: 16-bit, 500 Msps, 2x-8x interpolation dual-channel digital-to-analog converter (DAC). http://focus.ti.com/lit/ds/symlink/dac5687.pdf.

Texas Instrument, Inc., 2007. ADS5500: 14-bit, 125 Msps, analog-to-digital converter data sheet. Rev. G, Dallas, Texas, USA., pp: 1-29. http://focus.ti.com/lit/ds/symlink/ads5500.pdf.

Xilinx, Inc., 2003. DSP Design Flows in FPGA Tutorial Slides. Xilinx Press, San Jose, California, USA., pp: 1-82.

Xilinx, Inc., 2003. Virtex-II Pro and Virtex-II Pro X FPGA user guide. Ver. 4.2, San Jose, California, USA., pp: 1-559. http://www.xilinx.com/support/documentation/user_guides/ug012.pdf.

Xilinx, Inc., 2006. Spartan-3 FPGA family data sheet. Ver. 2.5, San Jose, California, USA., pp: 1-217. http://www.xilinx.com/support/documentation/data_sheets/ds099.pdf.

Xilinx, Inc., 2007. System generator for DSP user guide. Release 9.2.01, San Jose, California, USA., pp: 1-346.

Xilinx, Inc., 2007. Xilinx ISE 9.2i software manuals: Constraints guide and development system reference guide. San Jose, California, USA., pp: 1-844.

Design and power by Medwell Web Development Team. © Medwell Publishing 2024 All Rights Reserved